Typically in the power semiconductor device, power loss during conduction or transition loss generated in switching must be reduced. A power semiconductor device in an electrical circuit must be protected safely against inadvertent phenomenon (accidents) such as load short circuit, and therefore a wide safe operation area is another important characteristic required for the power semiconductor device.
The load short circuit refers to a short circuit in a load such as motor from some cause. If a short circuit is caused, there will be almost no load to limit current passed across the power semiconductor device, and power supply voltage is directly applied to the power semiconductor device, the current passed across which could take a huge value up to the limit value of the conduction capability of the power semiconductor device (from several hundred to several thousand A/cm.sup.2). Therefore, power at the time of a load short circuit could cause a very hazardous condition which leads to damages to the entire system or explosion.
In order to solve the problem of the load short circuit, it is critical to obtain a power semiconductor device strong against a load short circuit, in other words, a power semiconductor device having a wider Short-Circuit Safe Operation Area (herein after simply as "SCSOA").
To increase the SCSOA is the trade off for improvement in the on-voltage (forward voltage drop) or the switching characteristic among other characteristics of the power semiconductor device, and therefore it is also important to increase the SCSOA without degrading these other characteristics.
As disclosed by Japanese Patent Laying-Open No. 7-235672, it is known that in a trench MOS gate IGBT, the trade off between the on-voltage and turn off loss or the trade off between the maximum control current and the SCSOA is effectively improved by forming the two dimensional pattern of an n-type emitter into a ladder shape. It is also reported that the size or shape of the ladder pattern of the n-type emitter can be devised to improve the short circuit withstanding level of the IGBT. The short circuit withstanding level herein refers to the length of time since the occurrence of a load short circuit during conduction unitl thermal destruction of the power semiconductor device by heat generated inside ("time endurance under short circuit condition," hereinafter simply as "tsc"). With a high short circuit withstanding level, in other words, with a long tsc, the power semiconductor device could be sustained for a longer period of time before a gate control signal is turned off by an external protection circuit connected to the device if a load short circuit occurs, so that the circuit can be turned off safely with a gate cut off signal.
The method with the ladder shaped, n-type emitter pattern disclosed by the above-described document, however, cannot increase the short circuit withstanding level to a sufficient level.